METHOD FOR CREATING SVM CLASSIFIER FOR DATA ANALYSIS ON FPGA

Abstract

The paper explores the use of SVM classifier method for data analysis on FPGA, which, despite its effectiveness, may face challenges related to limited resources and data processing speed. In this context, there is a need to develop new methods for integrating SVM classifiers with high-performance computing hardware. The increasing demand for speed and energy efficiency requires new approaches to implementing machine learning methods. One of the key tools for data classification and analysis is the Support Vector Machine (SVM), widely used in business, science, medicine, and many other fields. Developing an efficient and optimized method for creating SVM classifiers for FPGA requires further research and development, as existing methods may be suboptimal in terms of speed and FPGA resource utilization. The article provides an overview of known hardware solutions to this problem, proposed in the current scientific literature. Additionally, the effectiveness of combining hardware and software components to achieve significant acceleration of the data analysis process is discussed. The article emphasizes the need for further research and improvement to fully realize the transformative potential of machine learning classification methods.